Printer hammer drive circuit



p 16, 1969 F. A. BERNARD 3,467,005

PRINTER HAMMER DRIVE CIRCUIT Filed April 29, 1968 3 Sheets-Sheet 1HEHSPE E5 LWEPR ITJTER r- DRUM POSITION SIGNAL I I H6 5 REFZEEFEQVCE "-3SIGQIAL I /9/ PRINT l I i l l I :HAMMER I I I A IRV E I COMPUTER {NPUTIo P -mi ACTIVATING I I CIRCUITRY TXCD I E I CIRCUITS I I PAPER AND I IQ RIBBON FEED l ,mBBON As EMBLIEs I IADVANCE :sIeNALs l6 ggai l I 520231 i $1 -$53 I L I EJBL I B -1 I I32 LOCATIONS L l w i I I 2 /0 a 4 DATA5 PLANEs s 7 LC PLANE PC PLANE FIG 3 ERRoR PLANE I" '1 COMPARE PuLsE 1AND i WITH LOGIC "I" OUT BUFFER SENSE AND PC W I Pc PLANE 40 I WITHL095: I OUT 38 WRITE I IN LC PRINT CLOCK COUNT 2 R Q I CORE PLANE BUFFEEAD T BE AND R P L NPA IEQ PBI' AND COMPARE PULSE PRINT CLOCK COUNT 5 IDRIVER s Q BUFFER DDR ss R 47 BUFFER DDR ss AND HMm-ER 4 +5OV 45INVENTOR.

FIG 4 44 FRANCIS A. BERNARD M ATT EY Se t. 16, 1969 F. A. BERNARDPRINTER HAMMER DRIVE CIRCUIT 3 Sheets-Sheet 2 Filed April 29, 1968 Sept.16, 1969 F. A. BERNARD PRINTER HAMMER DRIVE CIRCUIT 3 Sheets-Sheet 5Filed April 29, 1968 ATTO E7 mm mmEE I E on.

E25: oh E -93 Gm 55w 3 y FL L x 1L E E FT'E JL E JL HIT E bmiz. 5&3 .LNEE E 9mm x 3m FIIL mx wwwmn -x mmmmo x 8m United States Patent Int. Cl.B41j 9/38 US. Cl. 101-93 10 Claims ABSTRACT OF THE DISCLOSURE A hammerdriver control system used for each of a plurality of hammers and hammeraddresses used in, for example, a 1,000 line per minute high-speeddrum-type line printer. A flip-flop circuit is used in each hammerdriver control circuit that can be held off during a power on sequence,and with hammer drive pulse width a function of drum speed, andsynchronous with drum speed, through logic control using a magneticpulse pickup signal input.

This invention relates in general to high-speed revolving drum-type lineprinters with a plurality of characters engraved around thecircumferential surface of the drum and with each character engravedrepeatedly transversely across the surface of the drum, and inparticular, to a specific printer hammer drive circuit used in aplurality of printer hammer drives duplicating the plurality ofaddresses and characters of the line printer system and with logiccontrol through a flip-flop circuit for each of the plurality of printerhammer drive circuits.

The present invention may be best understood through considering it inan environment of, for example, a 1,000 line per minute high-speed lineprinter containing a revolving drum with 64 different charactersengraved around its circumferential surface with each of the 64different characters engraved 132 times transversely across the surfaceof the drum and in correlation with what may be considered as 132addresses of the control system. Each of the 132 images engraved orembossed as repeated duplications of the same character are successivelyoffset a little each one from the previous character in order tocompensate for rotation of the drum. A relatively small gear shapedmagnetic pulse initiating wheel is connected for rotation with the drumand is so rotationally set that the magnetic pulses initiated withrotation thereof through a magnetic pulse pickup system correspondtiming wise with respect to degrees of rotation of the drum and withparticular character relation relative to the circumferential rotationalposition of the drum. A count of the pulses produced through thismagnetic pickup system as generated with rotation of the toothed gearprovides an indexing way of knowing where each of the 64 characters islocated with respect to the first character. It is a system makingpossible the controlled selective actuation of respective hammers instriking an ink impregnated ribbon and paper for printing the desiredcharacters through the controlled timing actuation of the hammersrelative to selected character positions on the drum in printing a linethrough each print cycle of operation of the line printer. With suchline printer systems of the drum type, the 1,000 line per minute printeralso is provided with a core memory buffer that stores data as receivedfrom a computer, with the buffer being large enough in storage capacityto store one complete line of print. When a line of print has beenstored in the buffer, a print cycle is started. The first character thatwas stored during the input cycle is read out again. At this point, thelocation of the character on the drum is translated into the code forthat character and then, if the code read out from the memory and thetranslated code compare, a bit is set into a core plane reservedPatented Sept. 16, 1969 "ice for storing information that a compare hasbeen found for that character. With this occurring, a print comparestrobe is generated that is gated with an address to selectivelydetermine just which specific hammer of the 132 hammers is therebycontrolled to fire. Further, this controls the output of a print cycleflip-flop to insure the firing of the hammers actuated for print onlyduring the print cycle, and with logic circuitry being such that theflip-flop with the same address is reset two print scans later with theindividual hammers being fired in effect through duration of two printcharacters timing from the print drum.

With the individual hammer control and firing circuits, in many existingline printers using a revolving drum, oneshot circuits have beenutilized for firing the respective hammers for print since, with many ofthese existing line printer systems, no reset pulses were convenientlyavailable to turn off a flip-flop such as employed in applicants system.With such one-shot controlled systems, there is a very high sensitivityto noise, with noise many times inadvertently causing hammers to fire,particularly during power on sequences. A further deficiency ofsignificance with many of the existing systems was that the hammer driveactuating pulse widths out of these one-shot control systems for drivingthe individual hammers have a tendency to drift due to aging and is alsohighly sensitive to marginal voltages. These significant problems havein large measure been substantially eliminated through applicants hammerdrive circuits employing flip-flop circuitry.

It is, therefore, a principal object of this invention to provide aprinter hammer drive circuit for use in line printers of the revolvingdrum type substantially eliminating the problems of noise actuation ofhammer drive circuits to fire.

Another object is to provide such a hammer drive circuit that may bepositively held off during a power on sequence of the line printersystem and that thereby substantially eliminates the possibility ofhammer misfire during such power on sequences.

A further object is to provide in such a printer hammer drive circuit,with activating pulse width, a function of drum rotational speed thatvaries only with respect to variations in drum speed and that regardlessof variation in drum rotational speed remains synchronous with rotationof the drum.

Features of this invention useful in accomplishing the above objectsinclude, in a printer hammer drive circuit, a flip-flop circuitcontrolled by logic input signalling and providing an output to a hammerdriver having positive on and consistent actuation pulse duration andpositive off control providing good hammer print registration inprinting on a drum-type line printer, such as a high-speed 1,000 lineper minute printer presently in use. The control logic inputs to thehammer drive circuit flip-flop are such that the output pulse therefromas supplied to each respective hammer driver solenoid will be the samefor each solenoid and remain the same as long as the printer is in use.The setting and resetting of the flip-flop circuitry driving the hammerdriver solenoid is accomplished with logic control in turn using pulsesgenerated off the toothed gear via the magnetic pulse pickup system withgear and drum rotation for its timing duration. The turning on and offof the hammer driver, in being controlled by logic signalling to theflip-flop circuitry, is a decided improvement over being controlled byRC time constants, as is inherent with many existing hammer drivesystems using one-shot circuits. With duplication of the hammer drivesystems and the action 132 times, all hammers will be driven underflip-flop control. This is with logic control being applied to two otherflip-flops having resulting logic outputs that are applied with otherlogic signal inputs to gating circuitry controlling the flip-flop of thehammer driver circuit. When the proper character on. the rotating drumis aligned wth a hammer and is equal to the same character that isloaded into the buffer for printing out of this character, a set pulseis sent to this flip-flop while the X and Y address is being sent to thehammer flip-flop logic. The reset pulse to the flip-flop is inhibited atthis time due to the fact that the compare pulse is present. At the sametime that the hammer set pulse turns on the flip-flop, the logic of theprinter sets ONE into a core plane with equivalent location of thisparticular hammer being that which was just turned on, and with thiscore plane being identified as the LC (Last Character) flip-flop plane.The compare plane is also turned on at the same time and, as the nextcharacter on the drum is approached, the address location of this hammerthat is fired corresponds to the location of the core memory reading outa ONE in the print compare plane and a LC (Last Character) plane. Thepresence of these two flip-flops being set at this time inhibits thesetting and resetting of the particular hammer driver flip-flop that hasbeen fired in the previous character action. Simultaneously, throughthis time, the logic is such that while a ONE is written into the LCflip-flop plane, the print compare plane is inhibited. As the nextcharacter pulse is approached with drum rotation and the proper addressis sensed for the hammer driver circuit in question, the LC flip-flopwill be set to read out that contained in core storage at that addressand the print compare flip-flop will not be set at this time. Throughthe use of these two flip-flops and their associated address, a resetpulse will be sent to the hammer driver flip-flop turning it off at theproper time in a logic actuating system thereby allowing the hammerdriver flipflop to stay set through a two character pulse duration in a1,000 line per minute drum-type line printer.

A specific embodiment representing what is presently regarded as thebest mode of carrying out the invention is illustrated in theaccompanying drawings.

In the drawings:

FIGURE 1 represents a general schematic and block dagram of a computercontrolled high-speed line printer system;

FIGURE 2, a more detailed block diagram of portions of the computercontrolled high-speed line printer system of FIGURE 1 showingrelationships of components more directly related to a printer hammerdriver system;

FIGURE 3, a showing of the ten planes in just one address of the storagebuffer that is used to store character and special information in tenplanes for each of 132 addresses;

FIGURE 4, a circuit schematic showing of one of the 132 individualprinter hammer drive circuits used; and

FIGURE 5, a showing of various waveforms generated in operation of thesystem of FIGURES 1 and 2 and including waveforms applied as inputs tothe printer hammer drive circuit schematic of FIGURE 4.

Referring to the drawings:

The high-speed line printer system of FIGURE 1 is shown as having aninput output (I/O) line A information input connection from a computercircuit 11 to a line printer control circuit 12 within the high-speedline printer system 10 from which transmit computer data (TXCD)information return is connected back to the computer circuitry 11. Thehigh-speed line printer system 10 provides, for example, a high-speedprinting capability of up to 1,000 lines per minute using 48 consecutivecharacters on print drum 13 with 132 print positions (or addresses).This is with a horizontal spacing of 10 characters per inch, andvertical spacing of 6 or 8 lines per inch along with other desiredcharcteristics. The line printer control circuit 12 is shown to have asignal output connection to the hammers and drive actuating circuitsection 14 from which the individual hammer drives 15 extend forprinting of characters on paper at the print drum 13. Additional signaloutputs from the line printer control circuit include, a paper andribbon advance signal connection to the paper and ribbon assembliessection 16, and a channel select signal output connection to the papertape reader section 17 which generates a paper advance signal outputconnected through signal means, as an additional input, to the paper andribbon feed assembly section 16. The print drum 13, the hammers anddrive actuating circuit section 14, the paper and ribbon assemblysection 16 and the paper tape reader 17 are all contained within a lineprinter section 18. Please note that a ZERO reference or home pulsemagnetic pickup signal is generated within the line printer section witheach 360 rotation of the drum by a magnetic pickup system 19 and appliedback as an input to the line printer control circuit 12. Further, drumposition signals generated as character pulse magnetic pickups throughmagnetic pickup system 20 are also fed back as an input to the lineprinter control circuit 12.

In operation, computer circuitry 11 sends data and commands to the lineprinter control circuit 12 on the I/O input A line and receivesresponses on the TXCD line. The line printer control 12 accepts andprocesses the data and commands from the computer circuitry 11 andmonitors positioning of the drum and paper in the high-speed lineprinter 10. The line printer cntrol 12 sends the required responses tothe record channel and provides required commands in the high-speed lineprinter 10 for positioning the paper and to print the requiredcharacters. Various commands received and processed by the line printercontrol 12 include:

Write (No Automatic Space);

Write in space 1, 2, or 3 lines after print;

Write and skip to Channels 1 through 8 after print; Immediate space l,2, or 3 lines);

Immediate skip (Channels 1 through 8);

Status Request; and

End of Line (Short Report).

Referring also to the more detailed block and schematic diagram ofFIGURE 2, character counter circuit 21 is shown to be connected forreceiving home pulse signals from magnetic pulse pickup system 19, anddrum character pulses from the magnetic pulse pickup signal system 20.Please note that the home pulse magnetic pickup system includes amagnetic pulse initiating tooth, or insert, in the print drum 13, asshown in FIGURE 1, wherein, for each 360 rotation of the print drum ahome pulse or ZERO reference signal is generated and fed back to thecharacter counter circuit 21 of line printer control 12. In a somewhatsimilar manner, teeth of a gear wheel in the drum character pulsemagnetic pickup system 29 generates character position pulses withrotation of the print drum 13 and of the gear wheel of the pickup system20 with the magnetic pickup pulses being fed back to the charactercounter circuit 21 of line printer control 12. The output of charactercounter circpit 21 is connected to character counter decoder circuit 22which is provided with a signl output feedback connection to thecharacter counter circuit 21 and also with an output connecton tocharacter counter encoder 23. The output of character counter encoder 23is connected as an input to compare logic circuit 24 having an outputconnected to parity generator and error detector circuit 25. The outputof circuit 25 is applied as an input to error status circuit 26 whichhas an additional input form timing and control circuit 27 and develpesan output applied as a TXCD input to computer circuitry 11. Please notethat timing and control circuit 27 is connected as an additional inputto compare logic circuit 24 and as an additional input to paritygenerator and error detector circuit 25 as well as being connected as aninput to the memory control clock circuit 28 having an output applied asan input to read-and-write control circuit 29 also receiving an inputfrom the timing and control circuit 27..An additional input to the Read/Write control circuit 29 is provided from the address register circuit30 also receiving an input signal from timing and control circuit 27.The output of Read/ Write control circuit 29 is applied as an input tostorage buffer circuit 31 having an output connection as an input to therespective sense amplifiers 32 in turn having a feedback connection totiming and control circuit 27, and with an output signal connection asan input to data register 33. The data register circuit 33, along withcomputer circuit 11, in addition to other circuits heretofore mentioned,is connected for receiving signal inputs from the timing and controlcircuit 27. The data register 33 also'receives an input from thecomputer circuitry 11 in order to develop a Signal output appliedthrough a connection back to the compare logic circuit 24, and also asignal output connected to the inhibit generators section 34. Theinhibit generators section 34 is connected for feeding output signals tostorage buffer circuit 31 and also has anoutput connection to paritygenerator and error detector circuit 25.

The hammers and drive actuating circuit section 14, as shown in FIGURE2, has a signal input connection from the address register 30 to hammerdecoder circuit 35, additionally having an input from compare logic 24and also a signal input connection from timing and control circuit 27Signal output of the hammer decoder circuit 35 is passed throughinterconnect circuitry to individual hammer drivers 36 that haveindividual circuit connections for respective hammers 37. Please notethat the hammer decoder circuit 35 accepts address information fromftheaddress register and hammer set or reset strokes from the compare logiccircuit 24 and uses this information to determine which, if any, of thehammer drivers in'the hammer drivers section 36 are to be activated. Thehammer decoder 35 activates hammer drivers only during the print mode.When a synchronization error exists, or at any time other than a printload, the hammer decoder holds a constant reset signal to all hammerdrivers. Please note further that there are 132 individual addressablehammer circuits, one for each hammer. When a specific hammer driver 47is addressed and a hammer set strobe is applied simultaneously, thehammer driver causes the associated hammer to fire and print. When thesame driver 47 is addressed two scans later, the hammer set strokeresets that hammer driver.

In a buffer logic, a memory clock provides a 32 count clock sequence ofapproximately 1.6 microseconds duration, and the 32 counts are decodedto provide high precision timing for the memory control functions (read,write, inhibit, etc.). Further, there is a sync at the start of eachthree counts in each data print mode individual hammer print cycle. Itis opportune at this point to consider the storage buffer withparticular reference to the showing in FIGURE 3 of ten planes at justone address in 132 addresses of the storage buffer that is used to storecharacter and special information in ten planes for that address. Thestorage buifer is a card mounted core buffer used to store character andspecial information in ten planes for each of the 132 addresses that areused by the line printer control. Information stored in the ten planesfor each of the 132 individual addresses includes the following: sixdata planes with six bits of the data character stored in the first sixdata planes. The seventh data plane of FIGURE 3 is used as a parityplane if necessary for storing a parity bit to maintain odd parity forthe data character plus parity bit. The LC plane shown in FIGURE 3, isthe last character plane indicating that all characters are printed andcontrols initiation of the line terminate sequence. The PC plane isactually the print compare plane providing an error check in conjunctionwith a hammer fire echo pulse. And finally, the error plane stores anyerror indication that may have occurred during the print mode.

Referring now to the individual printer hammer drive circuit of FIGURE4, which is just one of the 132 individual printer hammer drive circuitsused, the circuit is shown to include part of the timing and controlcircuit 27 wherein a storage buffer sense PC plane signal line isconnected as an input to AND gate 38, and a buffer read strobe signalline is connected as an input both to the AND gate 38 and to AND gate39. The additional input to AND gate 39 is a buffer sense LC planesignal line and the outputs of the AND gates 38 and 39 are connected tothe set inputs of the PC flip-flop 40 and the LC flipfiop 41respectively. The reset inputs of both of the flipfiops 40 and 41 oftiming and control circuit 27 are connected in common to receive a printclock count two signal input. The 6 output terminal of PC flip-flop 40*is connected as an input to AND gate 42 which is a four input AND gateand also as an input to three input AND gate 44. The Q output terminalof LC flip-flop 41 is connected as an input to three input AND gate 44while the '65 output of LC flip-flop 41 is connected as an input to thefour input AND gate 42. AND gate 42 also has an input connection forreceiving a compare pulse signal input and an input connection forreceiving a print clock count five input for developing an AND gateoutput applied in turn as an input to AND gate 43. The print clock countfive signal line is connected also as an input to AND gate 44 fordeveloping with other input signals an output connected as an input toAND gate 45. A buffer address X1 signal line and a buffer address Y0signal line are connected as inputs to AND gate 45 and are alsoconnected as inputs to AND gate 43. The outputs of AND gates 43 and 41are connected to the set and reset input terminals respectively ofhammer flip-flop 46, the Q output terminal of which is connected to theindividual driver amplifier 47 of the hammer driver section 36. Thedriver amplifier 47 which may be, and in one working embodiment is, asolid state electronic switch, and has an output connection through thehammer driving coil 48 to a positive voltage supply 49 indicated asbeing a positive 50 volts line, and acts with activating current flowthrough the coil 48 to move the respective hammer drive 15 and hammer toprint.

Please note that the 6 output of LC flip-flop 41 is also connected as aninput to AND gate 50 of generator and detector circuit 25 for the onespecific address, for the illustrated circuit, of 132 addresses. The ANDgate 50 also has an input connection for receiving a compare pulsesignal and also an input connection for an inhibit input signal linethat is also connected as an input to AND gate 51. The Q output terminalof LC flip-flop 41 is also connected as an input to AND gate 51. Theoutput of AND gate 50 which is a logic 1 signal output line for a write1 in the PC core plane of the respective specific address of the storagebuffer is also connected as an input to OR gate 52, the other inputconnection of which is the output of AND gate 51, and this is with theOR gate 52 output being the logic 1 out for writing a l in the LC coreplane of the respective specific address of the storage buffer, such asindicated in FIGURE 3.

Referring also to FIGURE 5, the waveforms include first, at the top, aspecific scan waveform with character scan initiating sequence pulses asinitiated from the magnetic pickup system with rotation of the drum 13and as processed through circuitry of the system to and including thecharacter encoder 23, and is shown as an output therefrom that isapplied as an input to the compare logic circuit 24. The next waveformline down, the print clock count waveform, is developed with the timingand control circuit 27 with other system circuitry as initiated by therespective scans A, B, and C, etc. and counting therefrom withdistribution of various specific count pulse signals through specificcircuits of the specific count signals to other reacting circuits. Thenext four lines down are illustrative of X addresses, X1, X2, X3, and X4that are connected to respective hammer drive circuits 14 with addressX1 waveform being the one used for the specific address illustrated inFIGURE 4. The next three waveforms down are buffer read, buffer strobe,and buffer write waveforms respectively that originates in the memorycontrol clock 28 and are passed through the read and write control 29and applied to the storage buffer 31. The buffer inhibit pulse waveformis generated in the inhibit generators section 34 and applied as anadditional input to the storage buifer 31. The buffer read and strobewaveforms are also passed on from the storage buffer circuit 31 throughthe sense amplifiers circuit 32 to the data register 33. The comparepulse write 1 waveform is generated in the compare logic circuit 24 andpassed therefrom as an input to the hammer decoder circuit 35 in thehammers and drive actuating circuit section 14. This same waveform isalso applied from the compare logic circuit 24 to the parity generatorand error detector circuit 25. The write 1 waveform provides a pulseapplied to both the LC and the PC planes of the storage buffer in the Ascan, and then a pulse only for the LC plane in the B and C scans shown,and in like manner for other scans not shown. The set pulse to hammerwaveform line is developed as an output of AND gate.43 and applied as aninput to the set terminal of the hammer flip-flop 46 in the hammers anddrive actuating circuit section 14. The next waveform is the LCflip-flop waveform developed as an output at the Q output terminal offlip-flop 41 that is applied as an input to AND gate. 44 and also aninput to AND gate 51. The PC flipflopwaveform is actually developed asan output appearing at the Q terminal of flip-flop 40. However, insteadof being used in this form, it is used in the inverted form as an outputof the 5 output terminal of the PC flip-flop 40 and in the inverted formapplied as an input to AND gate 42 and AND gate 44. Referring now to thehammer flip-flop 46 Q output waveform, this waveform is initiallyinitiated to the on state by the start of the pulse of the set to pulseto hammer waveform output of AND gate 43 and then ultimately is turnedoff by the start of the reset pulse to hammer flip-flop waveformdeveloped as an output of AND gate 45 applied as an input to the resetterminal of hammer flip-flop 46. An important waveform is the address Ywaveform applied as an input to AND gate 45 where it as an input alongwith the buffer address X1 input can also, along with the output of ANDgate 44 as an input to AND gate 45, produce the reset pulse to hammerflip-flop 46 waveform output. The AND gate 44 output is the result ofthe LC flip-flop signal waveform input thereto along with the T invertedwaveform of the PC fiip-fiop input to the AND gate 44 and including aprint clock count five input thereto which is also an input to AND gate42.

In operation with such hammer driver control circuitry and the relatedcomputer system, please note again that in order to acquire a goodacceptable quality of print registration with high-speed line printoperation, such as a print rate of 1,000 lines per minute, it isextremely important that substantially the same pulse duration beachieved in actuation of each hammer driver solenoid coil 48. With othersystems employing one-shot circuits and other circuits with RC timeconstant factors in control of the drive-to-hammer solenoids, the printregistration has been poor, particularly as influenced by the adverseaffect of aging components in causing activating pulse duration driftand change. In applicants system, as shown and described, the hammerdriver solenoid actuating pulses are of substantially the same durationafter initial set and adjustment and remain the same. so long as theprinter is in use. This is with setting and resetting of the flip-flopdriving the respective hammer driver solenoids being accomplished withlogic control as initiated through timing pulse pickups from a magneticpickup sys tem developing time pulses with rotation of the print drum.Please note that since the speed of the drum 13 is controlled by a 60cycle source, the rotational speed of the drum may vary from printer toprinter, but will not vary for a specific particular printer once theprint speed has been established. Further, with the flip-flop drivinghammer circuit control, the individual hammer driver solenoid coils 48are much less susceptible to noise actuation than in many of theexisting systems using oneshot circuits and other RC time actuatingpulse time control circuits. In one specific machine having 132addresses and 132 individual hammers, the circuitry and logic actionshown and described with respect to one address is substantiallyduplicated 132 times with, of course, the address input informationbeing specific for each of the 132 addresses. With respect to the hammerflip-flop 46 actuation and control, simply stated, the setting andresetting of the flip-flop 46 necessitates the use of two additionalflip-flops 40 and 41 along with two core planes that must be used in aline printer in order to control the setting and resetting of the hammerdrivers used in a line printer. The operational action is such that whenthe proper character on the rotating drum is aligned with the respectivehammer and is equal to the same character that is loaded into the bufferfor printing outthis character, a set pulse is sent to this flip-flopwhile the X and Y addresses are still being sent to the hammer flipfioplogic. The reset pulse to the flip-flop is inhibited at this particulartime since the LC flip-flop is not on for the particular address. At thesame time that the hammer set pulse turns on the flip-flop, the logic ofthe printer sets 1 into a core plane with the equivalent location ofthis particular hammer that is turned on with the particular core planeinvolved being the LC flip-flop plane. The print compare plane is alsoturned on at this same time. As the next charcater of the drum isapproached, the address location of the just-fired hammer corresponds tothe location of the core memory then reading out a 1 in the printcompare plane and a LC plane. The presence of these two flip-flops beingset at this time will inhibit the setting and resetting of theparticular hammer driver flip-flop that has been fired for itsparticular previously fired character. Through this same time interval,the logic is such that, whereas a 1 is written into the LC flip-flopplane, the print compare is inhibited. Then, as the next character pulseof the drum approaches and the proper address is sensed for theparticular hammer driver, the LC flip-flop will be set from read-out inthe core storage, and the print compare flipfiop will not be set at thistime. Through use of these two flip-flops and their associatedaddresses, a reset pulse will be sent to the hammer driver flip-flopturning it off at the proper time. This in turn allows the hammerflip-flop to stay set through a two-character pulse duration in a 1,000line per minute operation drum line printer where with such high-speedoperation use of such a logic control flip-flop hammer driver controlsystem is particularly useful as opposed to one-shot circuit controloperation in that the pulse duration to the hammer solenoids remainssubstantially constant with a particular printer, while oneshot controlcircuits and other RC time influenced control circuits allow pulseduration to vary as components age.

Whereas this invention is herein illustrated and described with respectto a specific embodiment thereof, it should be realized that variouschanges may be made without departing from the essential contributionsto the art made by the teachings hereof.

I claim:

1. A hammer driver control system for a line printer using a pluralityof print hammers, and having: a plurality of hammer addresses in acomputer logic control section for relative specific print hammers; ahammer flip-flop having set and reset" input terminals and an outputterminal; logic circuit input connection to said set and reset inputterminals for logic controlled setting and resetting of said hammerflip-flop and providing a precise logic determined start, stop andduration output pulse; and a hammer driver actuating coil circuitconnected to said output terminal of the hammer flip-flip and a voltagepotential source for current flow actuation of the coil and hammer drivewhen said hammer flip-flop is activated for providing an output terminaloutput pulse.

2. The hammer driver control system of claim 1, 75 wherein said hammerdriver actuating coil circuit includes, a hammer driver coil and adriver amplifier between said hammer flip-flop output terminal and saidhammer driver coil.

3. The hammer driver control system of claim 2, wherein said hammerflip-flop output is a flip-flop Q terminal output.

4. The hammer driver control system of claim 2, wherein said driveramplifier is a switching amplifier.

5. The hammer driver control system of claim 1, wherein said lineprinter is: a high-speed.drum-type line printer with a rotatingcharacter drum and magnetic pulse pickup signal means having magneticpulse initiating means in synchronous rotation with drum rotation; saidmagnetic pulse pickup signal means being a pulse signal source acting asan input to said computer logic control section with resulting logictiming and control of each hammer driver control circuit to be held offduring a power on sequence, with hammer drive pulse width a function ofdrum speed, and in synchronous with drum speed.

6. The hammer driver control system of claim 1, wherein each individualhammer driver control circuit also includes an AND gating sectiondeveloping two outputs that are applied as the inputs to the set" andreset terminals of said hammer flip-flop, and with the AND gatingsection receiving a plurality of logic control inputs including: inputsfrom a compare pulse signal source, a print clock source specific countpulse, and specific X and Y address inputs from a computer bufier logicsource.

7. The hammer driver control system of claim 6, also including twoadditional flip-flops in the logic control circuitry specific to and ineach individual hammer driver control circuit.

8. The hammer driver control system of claim 7, wherein said twoadditional flip-flops receive a specific count pulse from said printclock source applied as an input to the reset input terminals of both ofsaid two additional flip-flops; with one of said additional flip-flopsbeing a PC flip-flop receiving a set input terminal input from an ANDgate having a buffer sense PC plane signal source input connection, anda, bulfer read strobe signal source input connection; and with the otherflipfiop being a LC flip-flop receiving a set input from an AND gatehaving a buffer sense LC plane signal source input connection and also abuifer read strobe signal input connection.

9. The hammer driver control system of claim 8, wherein the Q (invertedsignal output) of the PC flip-flop is connected as an input to saidgating section; and both the Q and Q outputs of the LC flip-flop areconnected as additional inputs to said gating section.

10. The hammer driver control system of claim 9, wherein said gatingsection includes at least one four input AND gate, and a plurality ofthree input AND gates.

References Cited UNITED STATES PATENTS 2,909,678 10/1959 Jensen 307291 X3,117,514 1/196l4 Doersam 10l--93 3,142,247 7/1964 Sweeney 101--933,211,087 10/1965 Sapino et al. 101-93 3,247,788 4/1966 Wilkins et al.101--93 3,270,288 8/1966 Hackett 307269 X 3,309,530 3/1967 Lacher 307269X 3,358,238 12/1967 Shapiro et a1 307269 X 3,366,044 1/ 1968 Marsh101-93 3,406,381 10/1968 Peyton 340172.5

WILLIAM B. PENN, Primary Examiner

